Job Description

We’re Hiring – Digital Design Engineers | Bangalore
We are opening new positions for Senior and Junior Digital Design roles!
Senior Digital Design Engineer (10+ yrs)
• Digital architecture, RTL, low‑power, synthesis & timing
• Strong in RTL, CDC, STA, Pn R, UPF, System Verilog
Junior Digital Design Engineer (3+ yrs)
• Implement digital blocks
• RTL flow: Lint / CDC / CLP
• Scripting: Perl / TCL / Python
Interested or know someone who fits? Feel free to share profiles!

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