AI ASIC/FPGA Verification Engineer (SystemVerilog/UVM)

DEEPX is seeking a seasoned Digital Circuit Design and Verification engineer to advance on-device AI semiconductor technologies. You will develop testbenches, verify RTL, and build robust verification environments using SystemVerilog and UVM.

The ideal candidate brings 3+ years of experience in ASIC/FPGA design with proficiency in simulation tools and a strong scripting capability. This full-time role offers competitive compensation and growth in a cutting-edge AI hardware company.